THE INTERVAL STEGO-KEY METHOD FOR INCREASING THE VOLUME OF HIDDEN DATA STORAGE IN THE ENVIRONMENT OF FPGA CHIPS PROGRAM CODE
DOI:
https://doi.org/10.35546/kntu2078-4481.2025.1.2.1Keywords:
steganographic data embedding, digital watermarks, stego-key, program code monitoring, FPGA chips, program code information objectAbstract
The article considers the issues of hidden storage of monitoring data in the environment of low-level program code of FPGA chips when performing monitoring of this program code. Monitoring the security characteristics of program code, such as integrity, authenticity, and ways of its distribution, is one of the main components of ensuring the security of programmable systems. The article notes that the methods of monitoring the security characteristics of FPGA program code are promising, in which the monitoring data used by these methods are embedded in the program code in a steganographic way in the form of a digital watermark. As a result, such embedding does not affect the behavior of FPGA chips and does not change the characteristics of the system built on the basis of these chips. The advantage of this approach is that the fact of the presence of monitoring data in the program code and the fact of monitoring are hidden. However, when monitoring data embedded in program code is used for monitoring, there is a problem of recovering the initial state of this program code. The problem is that it is necessary to steganographically save both the monitoring data and the information to recover the initial state of the program code. However, the volume of information required for recovery can take up a very large part of the volume of the digital watermark. This significantly reduces the part of the digital watermark that contains the monitoring data itself. As a result, a situation often arises when the effective volume of the digital watermark is insufficient to save monitoring data with the size required for monitoring. The paper proposes ways to solve this problem by applying an interval approach to the formation of a stego-key for embedding data in program code. The paper describes an experimental research of the approach proposed in the article and shows the advantages of this approach.
References
Tu K., Tang S., Yu X., Josipovic L., Chu Z. FPGA EDA: Design Principles and Implementation. Singapore: Springer, 2024. 248 p.
Hajji B., Mellit A., Bouselham L. A Practical Guide for Simulation and FPGA Implementation of Digital Design. Singapore : Springer, 2022. 312 p.
Tehranipoor M., Zamiri Azar K., Asadizanjani N., Rahman F., Mardani Kamali H., Farahmandi F. Hardware Security: A Look into the Future. Cham : Springer, 2024. 546 p.
Pfleeger C., Pfleeger S., Margulies J. Security in Computing. 6th ed. Boston: Pearson, 2019. 800 p.
Anderson R. Security Engineering: A Guide to Building Dependable Distributed Systems. 3rd ed. Indianapolis: Wiley, 2020. 1232 p.
Bishop M. Computer Security. 2nd edn. USA, Boston: Addison-Wesley, 2018.
Stallings W. Cryptography and Network Security: Principles and Practice. 7th edn. United Kingdom, Harlow : Pearson Education Limited, 2017.
Bossuet L., Torres L. Foundations of Hardware IP Protection. USA, New-York: Springer, 2018.
Yahya A. Steganography Techniques for Digital Images. Springer, 2018. 122 p.
Shih F. Digital Watermarking and Steganography: Fundamentals and Techniques. 2nd ed. USA, Boca Raton : CRC Press. 2017. 320 p.
Fan L., Chan C., Yang Q. Digital Watermarking for Machine Learning Model: Techniques, Protocols and Applications. Singapore: Springer, 2023. 300 p.
Fridrich J. Steganography in Digital Media, Cambridge University Press, New York, 2010.
Ke Y., Liu J., Zhang M., Su T., Yang X. Steganography Security: Principle and Practice. IEEE Access. 2018 Vol. 6. P. 73009–73022. DOI: https://doi.org/10.1109/ ACCESS.2018.2881680
Zhou, H., Zhang, Y., & Wang, X. Data Integrity Verification and Monitoring in Cloud Storage. Journal of Cloud Computing: Advances, Systems and Applications. 2020. 9(1). P. 1–12.
Fridrich J., Goljan, M., Du, R. Lossless Data Embedding – New Paradigm in Digital Watermarking. EURASIP Journal on Advanced Signal Processing. 2002. P. 185–196.
Zashcholkin K., Drozd O, Shaporin R, Ivanova O, Sulima Y. Increasing the Effective Volume of Digital Watermark Used in Monitoring the Program Code Integrity of FPGA-Based Systems. IEEE East-West Design and Test Symposium (EWDTS). 2019. P. 53–58.
Zashcholkin K., Drozd O., Ivanova O., Sulima Y. Compositional method of FPGA program code integrity monitoring based on the usage of digital watermarks. Applied Aspects of Information Technology. Odessa, 2019. Vol. 2, № 02. P. 138–152.
Zashcholkin K., Drozd O., Ivanova O., Shaporin R., Veselska O., Stepova H. Embedding the Digital Watermarks into FPGA-Projects Containing the Adaptive Logic Modules. Dependable Systems, Services and Technologies (DESSERT’2019): Proceedings of 10th IEEE International Conference. United Kingdom, Leeds, 2019. P. 179–183.
Intel Quartus, https://www.intel.com/content/www/us/en/products/details/ fpga/development-tools/quartus-prime.html
